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286 lines
9.8 KiB
Bash
286 lines
9.8 KiB
Bash
#! /bin/sh
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# $Id: sparc-bus-auto.sh,v 1.1 2006/09/30 12:55:59 fredette Exp $
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# ic/sparc/sparc-bus-auto.sh - automatically generates C code
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# for SPARC bus emulation support:
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#
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# Copyright (c) 2003, 2005 Matt Fredette
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# 3. All advertising materials mentioning features or use of this software
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# must display the following acknowledgement:
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# This product includes software developed by Matt Fredette.
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# 4. The name of the author may not be used to endorse or promote products
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# derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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header=false
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for option
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do
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case $option in
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--header) header=true ;;
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esac
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done
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PROG=`basename $0`
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cat <<EOF
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/* automatically generated by $PROG, do not edit! */
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_TME_RCSID("\$Id: sparc-bus-auto.sh,v 1.1 2006/09/30 12:55:59 fredette Exp $");
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/* it was easiest, but probably not the most correct, to reuse the
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m68020 bus router, at least for the early SPARCs. there are
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probably real differences between the m68020 bus router and the bus
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router used by the MB89600, for example, but I don't have a
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datasheet for the latter. the placement of devices in the Sun
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4/2x0 address space, however, hints that the two probably are very
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similar. */
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/* we use OP3, OP2, OP1, and OP0 to represent bytes of lesser
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significance to more significance, respectively, matching Table 5-5
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in the MC68020 User's Manual (linear page 56 in my .ps copy).
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the Motorola OPn convention numbers bytes by decreasing
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significance (OP2 is less significant than OP1), and since Motorola
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CPUs are big-endian, this means that a higher numbered byte is
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meant to go to a higher address, which is good, because we can then
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use this to easily form indexes for TME_BUS_LANE_ROUTE, which
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expects a higher numbered index to correspond to a higher address
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in memory.
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however, since the same Motorola OPn convention always calls the
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least significant byte of any value OP3, regardless of the total
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size of the value, we need to adjust each OPn given the total
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size of the value, so that OP3 in a 24-bit value means address + 2,
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but OP3 in a 32-bit value means address + 3: */
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#define SIZ8_OP(n) ((n) - 3)
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#define SIZ16_OP(n) ((n) - 2)
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#define SIZ24_OP(n) ((n) - 1)
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#define SIZ32_OP(n) ((n) - 0)
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EOF
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# emit the 32-bit bus router:
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if $header; then :; else
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echo ""
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echo "/* the 32-bit bus router used on the early SPARCs: */"
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echo "static const tme_bus_lane_t tme_sparc32_router[TME_SPARC_BUS_ROUTER_SIZE(TME_BUS32_LOG2)] = {"
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# permute over maximum cycle size:
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for transfer in 1 2 3 4; do
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# these are real 68020 SIZ1 and SIZ0 bits:
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case ${transfer} in
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1) transfer_bits="01" ;;
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2) transfer_bits="10" ;;
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3) transfer_bits="11" ;;
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4) transfer_bits="00" ;;
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esac
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# permute over A1 and A0:
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for address in 0 1 2 3; do
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case $address in
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0) address_bits=00 ;;
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1) address_bits=01 ;;
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2) address_bits=10 ;;
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3) address_bits=11 ;;
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esac
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# permute over the size of the responding device's port:
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for port_size in 1 2 4; do
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# permute over the byte lane position of the responding device's port:
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for port_pos in 0 1 2 3; do
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# get a string describing the byte lanes connected
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# to this device. NB that the sparc 32-bit bus
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# router assumes that 8-bit devices are always
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# connected to D31-D24, and that 16-bit devices
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# are always connected to D31-D24 and D23-D16, and
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# cannot dynamically adapt to other
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# configurations:
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port_pos_end=`expr ${port_pos} + ${port_size}`
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port_pos_lane=$port_pos
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port_lanes=""
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while test `expr ${port_pos_lane} \< ${port_pos_end}` = 1; do
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port_lanes=" D"`expr \( \( ${port_pos_lane} + 1 \) \* 8 \) - 1`"-D"`expr ${port_pos_lane} \* 8`"${port_lanes}"
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port_pos_lane=`expr ${port_pos_lane} + 1`
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done
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if test `expr ${port_pos_end} \> 4` = 1; then
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port_lanes="${port_lanes} - invalid, array placeholder"
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elif ( test $port_size = 1 && test $port_pos != 3 ) \
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|| ( test $port_size = 2 && test $port_pos != 2 ); then
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port_lanes="${port_lanes} - incorrect for 32-bit sparc"
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fi
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# find the byte lane that would provide OP3. note
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# that it may not exist (lane < 0), or that it may
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# not be within the port:
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opn=`expr 4 - ${transfer}`
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opn_lane=`expr 3 - \( ${address} % ${port_size} \)`
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op3_lane=`expr ${opn_lane} - \( 3 - ${opn} \)`
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echo ""
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echo " /* [sparc] initiator maximum cycle size: "`expr ${transfer} \* 8`" bits"
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echo " [sparc] initiator A1,A0: ${address_bits}"
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echo " [gen] responder port size: "`expr ${port_size} \* 8`" bits"
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echo " [gen] responder port least lane: ${port_pos} (lanes${port_lanes})"
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echo " (code ${transfer}.${address}.${port_size}.${port_pos}, OP3 lane ${op3_lane}): */"
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# emit the bus router information for each lane:
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for lane in 0 1 2 3; do
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lane_warn=
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# if the sparc expects this byte lane to be connected
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# to the device at this port size:
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if test `expr ${lane} \< \( 4 - ${port_size} \)` = 0; then
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# if this lane is routed by the sparc when
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# reading at this transfer size and
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# address alignment:
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opn=`expr 3 - \( ${lane} - ${op3_lane} \)`
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if test `expr ${opn} \> 3` = 0 \
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&& test `expr ${opn} \< \( 4 - ${transfer} \)` = 0; then
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lane_read="OP(${opn})"
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# otherwise this lane isn't routed by the
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# sparc when reading at this transfer size
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# and address alignment:
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else
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lane_read="IGNORE"
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fi
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# otherwise the sparc does not expect this byte
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# lane to be connected to the device at this
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# port size:
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else
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lane_read="IGNORE"
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# if this lane is connected to the device
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# anyways, issue a warning:
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if test `expr ${lane} \< ${port_pos}` = 0 \
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&& test `expr ${lane} \< ${port_pos_end}` = 1; then
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lane_warn=" | TME_BUS_LANE_WARN"
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fi
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fi
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# dispatch on how this lane is routed by the
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# sparc when writing at this transfer size and
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# address alignment:
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case "${transfer_bits}${address_bits}.${lane}" in
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01??.3) lane_write="OP(3)" ;;
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01??.2) lane_write="OP(3)" ;;
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01??.1) lane_write="OP(3)" ;;
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01??.0) lane_write="OP(3)" ;;
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10?0.3) lane_write="OP(2)" ;;
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10?0.2) lane_write="OP(3)" ;;
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10?0.1) lane_write="OP(2)" ;;
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10?0.0) lane_write="OP(3)" ;;
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10?1.3) lane_write="OP(2)" ;;
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10?1.2) lane_write="OP(2)" ;;
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10?1.1) lane_write="OP(3)" ;;
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10?1.0) lane_write="OP(2)" ;;
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1100.3) lane_write="OP(1)" ;;
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1100.2) lane_write="OP(2)" ;;
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1100.1) lane_write="OP(3)" ;;
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1100.0) lane_write="UNDEF" ;; # XXX this is supposed to be OP0, but we can't deal with that
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1101.3) lane_write="OP(1)" ;;
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1101.2) lane_write="OP(1)" ;;
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1101.1) lane_write="OP(2)" ;;
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1101.0) lane_write="OP(3)" ;;
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1110.3) lane_write="OP(1)" ;;
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1110.2) lane_write="OP(2)" ;;
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1110.1) lane_write="OP(1)" ;;
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1110.0) lane_write="OP(2)" ;;
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1111.3) lane_write="OP(1)" ;;
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1111.2) lane_write="OP(1)" ;;
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1111.1) lane_write="OP(2)" ;;
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1111.0) lane_write="OP(1)" ;;
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0000.3) lane_write="OP(0)" ;;
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0000.2) lane_write="OP(1)" ;;
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0000.1) lane_write="OP(2)" ;;
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0000.0) lane_write="OP(3)" ;;
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0001.3) lane_write="OP(0)" ;;
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0001.2) lane_write="OP(0)" ;;
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0001.1) lane_write="OP(1)" ;;
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0001.0) lane_write="OP(2)" ;;
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0010.3) lane_write="OP(0)" ;;
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0010.2) lane_write="OP(1)" ;;
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0010.1) lane_write="OP(0)" ;;
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0010.0) lane_write="OP(1)" ;;
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0011.3) lane_write="OP(0)" ;;
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0011.2) lane_write="OP(0)" ;;
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0011.1) lane_write="OP(1)" ;;
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0011.0) lane_write="OP(0)" ;;
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esac
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# emit the comment for this lane:
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echo -n " /* D"`expr \( \( ${lane} + 1 \) \* 8 \) - 1`"-D"`expr ${lane} \* 8`" */ "
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# if this port size/position combination is
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# invalid, override everything and abort if
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# this router entry is ever touched:
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if test `expr ${port_pos_end} \> 4` = 1; then
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echo "TME_BUS_LANE_ABORT,"
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else
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if test $lane_read != "IGNORE"; then
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if test $lane_read != $lane_write; then
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echo "$PROG internal error: code ${transfer}.${address}.${port_size}.${port_pos}, reading $lane_read but writing $lane_write" 1>&2
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exit 1
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fi
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echo -n "TME_BUS_LANE_ROUTE(SIZ"`expr ${transfer} \* 8`"_$lane_read)"
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elif test $lane_write = "UNDEF"; then
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echo -n "TME_BUS_LANE_UNDEF"
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else
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echo -n "TME_BUS_LANE_ROUTE(SIZ"`expr ${transfer} \* 8`"_$lane_write) | TME_BUS_LANE_ROUTE_WRITE_IGNORE"
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fi
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echo "${lane_warn},"
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fi
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done
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done
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done
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done
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done
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echo "};"
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fi
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cat <<EOF
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#undef SIZ8_OP
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#undef SIZ16_OP
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#undef SIZ24_OP
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#undef SIZ32_OP
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EOF
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# done:
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exit 0 |