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480 lines
15 KiB
C
480 lines
15 KiB
C
/* $Id: mk48txx.c,v 1.4 2010/06/05 14:54:10 fredette Exp $ */
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/* ic/mk48txx.c - implementation of Mostek 48Txx emulation: */
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/*
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* Copyright (c) 2006 Matt Fredette
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Matt Fredette.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <tme/common.h>
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_TME_RCSID("$Id: mk48txx.c,v 1.4 2010/06/05 14:54:10 fredette Exp $");
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/* includes: */
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#include <tme/generic/bus-device.h>
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#include <tme/ic/mk48txx.h>
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#include <tme/misc.h>
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#include <time.h>
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#include <sys/time.h>
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/* macros: */
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/* the different parts: */
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#define TME_MK48TXX_PART_02 (02)
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#define TME_MK48TXX_PART_59 (59)
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/* register addresses: */
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#define TME_MK48TXX_REGS_COUNT (16) /* maximum number of registers */
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#define TME_MK48TXX_REG_YEAR (TME_MK48TXX_REGS_COUNT - 1) /* BCD year */
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#define TME_MK48TXX_REG_MON (TME_MK48TXX_REGS_COUNT - 2) /* BCD month */
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#define TME_MK48TXX_REG_DAY (TME_MK48TXX_REGS_COUNT - 3) /* BCD day in month */
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#define TME_MK48TXX_REG_WDAY (TME_MK48TXX_REGS_COUNT - 4) /* weekday */
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#define TME_MK48TXX_REG_HOUR (TME_MK48TXX_REGS_COUNT - 5) /* BCD hour */
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#define TME_MK48TXX_REG_MIN (TME_MK48TXX_REGS_COUNT - 6) /* BCD minutes */
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#define TME_MK48TXX_REG_SEC (TME_MK48TXX_REGS_COUNT - 7) /* BCD seconds */
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#define TME_MK48TXX_REG_CSR (TME_MK48TXX_REGS_COUNT - 8) /* control register */
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#define TME_MK48TXX_REG_WDOG (TME_MK48TXX_REGS_COUNT - 9) /* watchdog */
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#define TME_MK48TXX_REG_INTR (TME_MK48TXX_REGS_COUNT - 10) /* interrupts */
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#define TME_MK48TXX_REG_ADAY (TME_MK48TXX_REGS_COUNT - 11) /* BCD alarm day */
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#define TME_MK48TXX_REG_AHOUR (TME_MK48TXX_REGS_COUNT - 12) /* BCD alarm hour */
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#define TME_MK48TXX_REG_AMIN (TME_MK48TXX_REGS_COUNT - 13) /* BCD alarm minutes */
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#define TME_MK48TXX_REG_ASEC (TME_MK48TXX_REGS_COUNT - 14) /* BCD alarm seconds */
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/* (TME_MK48TXX_REGS_COUNT - 15) unused */
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#define TME_MK48TXX_REG_FLAGS (TME_MK48TXX_REGS_COUNT - 16) /* flags */
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/* the first register implemented by a part: */
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#define TME_MK48TXX_REG_FIRST(part) \
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((part) == TME_MK48TXX_PART_59 \
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? TME_MK48TXX_REG_FLAGS \
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: TME_MK48TXX_REG_CSR)
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/* bits in the CSR: */
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#define TME_MK48TXX_CSR_WRITE TME_BIT(7) /* start writing */
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#define TME_MK48TXX_CSR_READ TME_BIT(6) /* start reading */
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/* bits in the weekday register: */
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#define TME_MK48TXX_WDAY_FTEST TME_BIT(6) /* 512Hz frequency test */
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/* bits in the seconds register: */
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#define TME_MK48TXX_SEC_STOP TME_BIT(7) /* all stop */
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#define TME_MK48TXX_LOG_HANDLE(am) (&(am)->tme_mk48txx_element->tme_element_log_handle)
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/* structures: */
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struct tme_mk48txx {
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/* our simple bus device header: */
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struct tme_bus_device tme_mk48txx_device;
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#define tme_mk48txx_element tme_mk48txx_device.tme_bus_device_element
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/* our socket: */
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struct tme_mk48txx_socket tme_mk48txx_socket;
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#define tme_mk48txx_addr_shift tme_mk48txx_socket.tme_mk48txx_socket_addr_shift
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#define tme_mk48txx_port_least_lane tme_mk48txx_socket.tme_mk48txx_socket_port_least_lane
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#define tme_mk48txx_year_zero tme_mk48txx_socket.tme_mk48txx_socket_year_zero
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/* our mutex: */
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tme_mutex_t tme_mk48txx_mutex;
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/* the part emulated: */
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unsigned int tme_mk48txx_part;
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/* our timer condition: */
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tme_cond_t tme_mk48txx_cond_timer;
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/* it's easiest to just model the chip as a chunk of memory: */
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tme_uint8_t tme_mk48txx_regs[TME_MK48TXX_REGS_COUNT];
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/* if nonzero, the internal time-of-day needs to be updated: */
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tme_uint8_t tme_mk48txx_tod_update;
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};
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/* the mk48txx bus router: */
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static const tme_bus_lane_t tme_mk48txx_router[TME_BUS_ROUTER_SIZE(TME_BUS8_LOG2)] = {
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/* [gen] initiator port size: 8 bits
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[gen] initiator port least lane: 0: */
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/* D7-D0 */ TME_BUS_LANE_ROUTE(0),
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};
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/* these convert values to and from BCD: */
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static inline tme_uint8_t
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_tme_mk48txx_bcd_out(unsigned int value)
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{
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return ((value % 10)
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+ ((value / 10) * 16));
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}
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static inline unsigned int
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_tme_mk48txx_bcd_in(tme_uint8_t value)
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{
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return ((value % 16)
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+ ((value / 16) * 10));
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}
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/* this resets an mk48txx: */
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static void
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_tme_mk48txx_reset(struct tme_mk48txx *mk48txx)
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{
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/* clear the CSR: */
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_CSR] = 0;
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/* start the clock running normally: */
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_WDAY] = 0;
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_SEC] = !TME_MK48TXX_SEC_STOP;
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}
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/* the mk48txx bus cycle handler: */
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static int
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_tme_mk48txx_bus_cycle(void *_mk48txx, struct tme_bus_cycle *cycle_init)
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{
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struct tme_mk48txx *mk48txx;
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tme_bus_addr32_t address, mk48txx_address_last;
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tme_uint8_t buffer, value;
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struct tme_bus_cycle cycle_resp;
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unsigned int reg;
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struct timeval now;
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time_t _now;
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struct tm *now_tm, now_tm_buffer;
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/* recover our data structure: */
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mk48txx = (struct tme_mk48txx *) _mk48txx;
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/* the requested cycle must be within range: */
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mk48txx_address_last = mk48txx->tme_mk48txx_device.tme_bus_device_address_last;
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assert(cycle_init->tme_bus_cycle_address <= mk48txx_address_last);
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assert(cycle_init->tme_bus_cycle_size <= (mk48txx_address_last - cycle_init->tme_bus_cycle_address) + 1);
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/* get the register being accessed: */
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address = cycle_init->tme_bus_cycle_address;
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reg = (address >> mk48txx->tme_mk48txx_addr_shift) + TME_MK48TXX_REG_FIRST(mk48txx->tme_mk48txx_part);
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/* lock the mutex: */
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tme_mutex_lock(&mk48txx->tme_mk48txx_mutex);
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/* if the clock is not being read or written: */
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if ((mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_CSR]
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& (TME_MK48TXX_CSR_READ
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| TME_MK48TXX_CSR_WRITE)) == 0) {
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/* sample the time of day: */
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gettimeofday(&now, NULL);
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_now = now.tv_sec;
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now_tm = gmtime_r(&_now, &now_tm_buffer);
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/* put the time-of-day into the registers: */
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_HOUR] = _tme_mk48txx_bcd_out(now_tm->tm_hour);
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_MIN] = _tme_mk48txx_bcd_out(now_tm->tm_min);
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_SEC] = _tme_mk48txx_bcd_out(now_tm->tm_sec);
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_MON] = _tme_mk48txx_bcd_out(now_tm->tm_mon + 1);
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_DAY] = _tme_mk48txx_bcd_out(now_tm->tm_mday);
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_YEAR]
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= _tme_mk48txx_bcd_out((1900 + now_tm->tm_year) - mk48txx->tme_mk48txx_year_zero);
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_WDAY] = now_tm->tm_wday;
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}
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/* if this is a write: */
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if (cycle_init->tme_bus_cycle_type == TME_BUS_CYCLE_WRITE) {
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/* run the bus cycle: */
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cycle_resp.tme_bus_cycle_buffer = &buffer;
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cycle_resp.tme_bus_cycle_lane_routing = tme_mk48txx_router;
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cycle_resp.tme_bus_cycle_address = 0;
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cycle_resp.tme_bus_cycle_buffer_increment = 1;
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cycle_resp.tme_bus_cycle_type = TME_BUS_CYCLE_READ;
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cycle_resp.tme_bus_cycle_size = sizeof(buffer);
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cycle_resp.tme_bus_cycle_port =
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TME_BUS_CYCLE_PORT(mk48txx->tme_mk48txx_port_least_lane,
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TME_BUS8_LOG2);
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tme_bus_cycle_xfer(cycle_init, &cycle_resp);
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value = buffer;
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/* log this write: */
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tme_log(TME_MK48TXX_LOG_HANDLE(mk48txx), 100000, TME_OK,
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(TME_MK48TXX_LOG_HANDLE(mk48txx),
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"reg %d write %02x",
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reg, value));
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/* dispatch on the register: */
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switch (reg) {
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case TME_MK48TXX_REG_WDAY:
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/* flag that the time-of-day needs to be updated: */
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mk48txx->tme_mk48txx_tod_update = TRUE;
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/* update the register: */
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mk48txx->tme_mk48txx_regs[reg] = value;
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break;
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case TME_MK48TXX_REG_HOUR:
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case TME_MK48TXX_REG_MIN:
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case TME_MK48TXX_REG_SEC:
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case TME_MK48TXX_REG_MON:
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case TME_MK48TXX_REG_DAY:
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case TME_MK48TXX_REG_YEAR:
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/* flag that the time-of-day needs to be updated: */
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mk48txx->tme_mk48txx_tod_update = TRUE;
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/* update the register: */
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mk48txx->tme_mk48txx_regs[reg] = value;
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break;
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case TME_MK48TXX_REG_CSR:
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/* update the CSR: */
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mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_CSR] = value;
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break;
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case TME_MK48TXX_REG_ADAY:
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case TME_MK48TXX_REG_AHOUR:
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case TME_MK48TXX_REG_AMIN:
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case TME_MK48TXX_REG_ASEC:
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case TME_MK48TXX_REG_WDOG:
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case TME_MK48TXX_REG_INTR:
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case TME_MK48TXX_REG_FLAGS:
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/* update the register: */
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mk48txx->tme_mk48txx_regs[reg] = value;
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break;
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default:
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/* ignore */
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break;
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}
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}
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/* otherwise, this is a read: */
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else {
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assert(cycle_init->tme_bus_cycle_type == TME_BUS_CYCLE_READ);
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/* dispatch on the register: */
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switch (reg) {
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case TME_MK48TXX_REG_HOUR:
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case TME_MK48TXX_REG_MIN:
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case TME_MK48TXX_REG_SEC:
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case TME_MK48TXX_REG_MON:
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case TME_MK48TXX_REG_DAY:
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case TME_MK48TXX_REG_YEAR:
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case TME_MK48TXX_REG_WDAY:
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case TME_MK48TXX_REG_ADAY:
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case TME_MK48TXX_REG_AHOUR:
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case TME_MK48TXX_REG_AMIN:
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case TME_MK48TXX_REG_ASEC:
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case TME_MK48TXX_REG_WDOG:
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case TME_MK48TXX_REG_INTR:
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case TME_MK48TXX_REG_FLAGS:
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/* read the register: */
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value = mk48txx->tme_mk48txx_regs[reg];
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break;
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case TME_MK48TXX_REG_CSR:
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/* read the register: */
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value = mk48txx->tme_mk48txx_regs[reg];
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break;
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/* undefined registers return garbage when read: */
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default:
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value = 0xff;
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break;
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}
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/* log this read: */
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tme_log(TME_MK48TXX_LOG_HANDLE(mk48txx), 100000, TME_OK,
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(TME_MK48TXX_LOG_HANDLE(mk48txx),
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"reg %d read %02x",
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reg, value));
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/* run the bus cycle: */
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buffer = value;
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cycle_resp.tme_bus_cycle_buffer = &buffer;
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cycle_resp.tme_bus_cycle_lane_routing = tme_mk48txx_router;
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cycle_resp.tme_bus_cycle_address = 0;
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cycle_resp.tme_bus_cycle_buffer_increment = 1;
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cycle_resp.tme_bus_cycle_type = TME_BUS_CYCLE_WRITE;
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cycle_resp.tme_bus_cycle_size = sizeof(buffer);
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cycle_resp.tme_bus_cycle_port =
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TME_BUS_CYCLE_PORT(mk48txx->tme_mk48txx_port_least_lane,
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TME_BUS8_LOG2);
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tme_bus_cycle_xfer(cycle_init, &cycle_resp);
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}
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/* if the time-of-day registers have been updated, and the clock
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is running: */
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if (mk48txx->tme_mk48txx_tod_update
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&& ((mk48txx->tme_mk48txx_regs[TME_MK48TXX_REG_CSR]
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& (TME_MK48TXX_CSR_READ
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| TME_MK48TXX_CSR_WRITE)) == 0)) {
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/* XXX update the host's time-of-day clock? */
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mk48txx->tme_mk48txx_tod_update = FALSE;
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}
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/* unlock the mutex: */
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tme_mutex_unlock(&mk48txx->tme_mk48txx_mutex);
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/* no faults: */
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return (TME_OK);
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}
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/* the mk48txx TLB filler: */
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static int
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_tme_mk48txx_tlb_fill(void *_mk48txx, struct tme_bus_tlb *tlb,
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tme_bus_addr_t address, unsigned int cycles)
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{
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struct tme_mk48txx *mk48txx;
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tme_bus_addr32_t mk48txx_address_last;
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/* recover our data structure: */
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mk48txx = (struct tme_mk48txx *) _mk48txx;
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/* the address must be within range: */
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mk48txx_address_last = mk48txx->tme_mk48txx_device.tme_bus_device_address_last;
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assert(address <= mk48txx_address_last);
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/* initialize the TLB entry: */
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tme_bus_tlb_initialize(tlb);
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/* this TLB entry can cover the whole device: */
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tlb->tme_bus_tlb_addr_first = 0;
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tlb->tme_bus_tlb_addr_last = mk48txx_address_last;
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/* allow reading and writing: */
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tlb->tme_bus_tlb_cycles_ok = TME_BUS_CYCLE_READ | TME_BUS_CYCLE_WRITE;
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/* our bus cycle handler: */
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tlb->tme_bus_tlb_cycle_private = mk48txx;
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tlb->tme_bus_tlb_cycle = _tme_mk48txx_bus_cycle;
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return (TME_OK);
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}
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/* the new mk48txx element function: */
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static int
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_tme_mk48txx_new(struct tme_element *element,
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const char * const *args,
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const void *extra,
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char **_output,
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unsigned int part)
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{
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const struct tme_mk48txx_socket *socket;
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struct tme_mk48txx *mk48txx;
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struct tme_mk48txx_socket socket_real;
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tme_bus_addr_t address_mask;
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int arg_i;
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int usage;
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/* dispatch on our socket version: */
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socket = (const struct tme_mk48txx_socket *) extra;
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if (socket == NULL) {
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tme_output_append_error(_output, _("need an ic socket"));
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return (ENXIO);
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}
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switch (socket->tme_mk48txx_socket_version) {
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case TME_MK48TXX_SOCKET_0:
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socket_real = *socket;
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break;
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default:
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tme_output_append_error(_output, _("socket type"));
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return (EOPNOTSUPP);
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}
|
|
|
|
/* check our arguments: */
|
|
usage = 0;
|
|
arg_i = 1;
|
|
for (;;) {
|
|
|
|
if (0) {
|
|
}
|
|
|
|
/* if we ran out of arguments: */
|
|
else if (args[arg_i] == NULL) {
|
|
|
|
break;
|
|
}
|
|
|
|
/* otherwise this is a bad argument: */
|
|
else {
|
|
tme_output_append_error(_output,
|
|
"%s %s, ",
|
|
args[arg_i],
|
|
_("unexpected"));
|
|
usage = TRUE;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (usage) {
|
|
tme_output_append_error(_output,
|
|
"%s %s",
|
|
_("usage:"),
|
|
args[0]);
|
|
return (EINVAL);
|
|
}
|
|
|
|
/* start the mk48txx structure: */
|
|
mk48txx = tme_new0(struct tme_mk48txx, 1);
|
|
tme_mutex_init(&mk48txx->tme_mk48txx_mutex);
|
|
mk48txx->tme_mk48txx_part = part;
|
|
mk48txx->tme_mk48txx_socket = socket_real;
|
|
mk48txx->tme_mk48txx_element = element;
|
|
_tme_mk48txx_reset(mk48txx);
|
|
|
|
/* figure our address mask, up to the nearest power of two: */
|
|
address_mask = (TME_MK48TXX_REGS_COUNT - TME_MK48TXX_REG_FIRST(part)) << mk48txx->tme_mk48txx_addr_shift;
|
|
if (address_mask & (address_mask - 1)) {
|
|
for (; address_mask & (address_mask - 1); address_mask &= (address_mask - 1));
|
|
address_mask <<= 1;
|
|
}
|
|
address_mask -= 1;
|
|
|
|
/* initialize our simple bus device descriptor: */
|
|
mk48txx->tme_mk48txx_device.tme_bus_device_tlb_fill = _tme_mk48txx_tlb_fill;
|
|
mk48txx->tme_mk48txx_device.tme_bus_device_address_last = address_mask;
|
|
|
|
/* fill the element: */
|
|
element->tme_element_private = mk48txx;
|
|
element->tme_element_connections_new = tme_bus_device_connections_new;
|
|
|
|
return (TME_OK);
|
|
}
|
|
|
|
TME_ELEMENT_X_NEW_DECL(tme_ic_,mk48txx,mk48t02) {
|
|
return (_tme_mk48txx_new(element, args, extra, _output, TME_MK48TXX_PART_02));
|
|
}
|
|
|
|
TME_ELEMENT_X_NEW_DECL(tme_ic_,mk48txx,mk48t59) {
|
|
return (_tme_mk48txx_new(element, args, extra, _output, TME_MK48TXX_PART_59));
|
|
}
|